    Amiga 8meg ram expander  (C)1991 Silicon Synapse Electronics
Designed by John Kamchen  Support BBS: (204) 589-1078  Wpg,MB Canada Nov.28

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This project is ShareWare. If you build it, and it works (why wouldn't it?)
then passing $20 along my way would help pay for future projects as fantastic
as this one. The address is at the end of this file.
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With memory prices dropping every day, a fully expanded Amiga looks better all
the time. If you shop around, you can get a 1meg simm for less than $40. That
means an 8meg system will set you back $320. Not that bad, considering 3 years
ago that would have got you only 2 megs. But you need more than just RAM, you
also need a RAM CARD (duhh). These days, you have a big selection to choose
from. GVP, IVS, ICD to name a few. Some are simply RAM cards, some have an
SCSI host as well. My GrandSlam cost $300, a Meta4 about $175, DataFlyer RAM
about $125. Now you can build your own 8meg expander for less than $10 !

If you shop around, you can get all the interface and control chips for less
than $5 ($4.98 to be exact). The parts list shows prices from Active. Adding
sockets and whatever jacks the price up a few bucks.

Parts List:        Cost
     U1   74ls138   .40
U2 - U6   74ls157  2.35
U7 - U8   74ls245  1.28
     U9   74ls14    .35
    U10   74hc08    .31
    U11   74ls32    .29
Misc:
Decoupling caps 11 x .1uf

How it works:  RAM ACCESS
When the CPU accesses the area from $20000 to $9FFFFF, U1 decodes A21-A23 to
provide 4 possible bank select signals. About 58ns after _AS goes low, _RAS
will also go low. Depending on what kind of access it is (WORD BYTE READ
WRITE) one or two _CAS lines will go low either 94ns (READ) or >100ns (WRITE)
after _AS low. Remember that on the 68000, _UDS/_LDS go low at the same time
as _AS for a READ, but are delayed for a WRITE. That is why they go thru the 2
OR gates (U11). This ensures that _CASxx will fall at the right time.
When _AS goes high at the end of the cycle, _CASxx goes high first, then _RAS.

REFRSH MODE
The DRAM memory is being used in _CAS before _RAS refresh mode. This means
that if _CAS is brought LOW about 20ns before _RAS, the DRAM automaticly
selects what row to refresh. Only 64k x 4, 256k x 4 and 1meg x 1/4 support
this feature. Otherwise, there would need to be counters and stuff added,
maybe 5 more chips. When the CPU accesses CHIP ram ($0 to $1FFFFF), Y0 of U1
goes LOW. This is the signal that says 'Time to refresh, cuz we ain't gonna be
needed on this cycle'. All _CASxx lines will come low 72ns after _AS LOW,
followed by _RAS LOW 100ns after _AS LOW. So the time diff between _CAS and
_RAS is about 28ns, within the 20ns min parameter. The chip is kept refreshed
untill the cycle ends.

CONSTRUCTION:
This design uses D0-D15, A1-A23, R/W, _AS, _UDS and _LDS. All these signals
can be found at the expansion port of the 500, or CPU/Zorro slots on a 2000.
For 500 owners ,this board could also be placed under the 68000 itself,
saving your expansion port for better things. As long as you provide a good
power path, there should be no problems. My proto-type board with 2megs used
around 300ma while running Memory_Doctor, and 169ma just sitting there, no
programs running. It uses ALOT more than my GrandSlam (90ma) for refreshing,
but I'm not using custom chips and they are. For a 500 supply, 8megs might be
more than it can handle, so consider buying a 150-200w switching supply (any
AT type will do since they cost half as much as a '500 specific' supply).

SIMM sockets cost ALOT of bucks, so you may want to spend a $1 more and buy
SIPP ram (with the pins). Those can fit into normal IC sockets (Just to give
you an idea, 8megs of SIPP sockets cost $21, while 12 20pin sockets cost
$2.50). The SIPPs will tend to sit in at an angle, so fashion some type of
brace for them. If you use SIPP ram, the board won't fit inside a 500, but
low-profile SIMM sockets just might.

Get the exact same parts that I have in the parts list. Don't sub an HC for an
LS. All types have been chosen for their propagation times. Best place to get
the parts is Active Components. They are cheap, and always have good stock. I
have heard of people being charged upto $2 a chip at some other places (Radio
Shack, WES). Board layout isn't critical, but use some common sense, try and
keep data and address lines together, and so forth. Wire wrapping is OK.


ADDING RAM:
You can use 1meg by 8 (or 9, some place charge MORE for the 8bit sipp!), or
256k x 8/9 sipps. To use the 256k, they must have only 2 chips on them (3 if
it is a 9bit simm). Why?  The ones with 8 or 9 chips use 256k x 1 type DRAM
chips. Those are fine in other ram expanders but not here. They DON'T support
_CAS before _RAS refresh. The 256k x 4 do, so that's what type you need.
 ___________________________    ___________________________
 | || || || || || || || || |    |--------  --------   ----|
 | || || || || || || || || |    |--------  --------   ----|
 uuuuuuuuuuuuuuuuuuuuuuuuuuu    uuuuuuuuuuuuuuuuuuuuuuuuuuu
    These won't work!               These WILL work fine.

AUTO-CONFIG:
As is, the design will not configure on power up. A program called AutoAddRAM
is used to patch the expansion into the free memory pool. If you have a hard
drive, this can be done during the startup-sequence. For floppy users, follow
the docs for the program. Unlike a PAL'd ram card, this one hard-wires the ram
address area. The folowing are some examples of how to write the .arr file.

200000 3ffffe 0 Little         /* 2meg, using 1meg simm, in bank 1 & 8
400000 9ffffe 0 BigBoy         /* 6meg, using 1meg simm, bank 2,3,4,5,6 & 7

200000 27fffe 0 Expansion      /* 256k, using 256k simm, bank 1 & 8
400000 47fffe 0 Expansion      /* 256k, bank 2 & 7
600000 67fffe 0 Expansion      /* 256k, bank 3 & 6
800000 87fffe 0 Expansion      /* 256k, bank 4 & 5

With those last 256k areas, you just added 2megs, although it's broken up into
4 256k sections in the expansion mapped area. This is a cheaper way to get to
2megs, since those 256k simms are CHEAP when bought used. I found that APPLE
service centers seems to always have the right type of simm (I assume
Apple/Mac machines use _CAS before _RAS as well).
You can also mix and match memory sizes, 2megs using 1meg simms, and an extra
768k using 256k simms. This list shows where your memory will show up.

       Bank1/8  Bank2/7  Bank3/6  Bank4/5
from   $200000  $400000  $600000  $800000
256k   $27fffe  $27fffe  $67fffe  $67fffe
1meg   $3ffffe  $5ffffe  $7ffffe  $9ffffe

I provided an .iff picture of where to place the parts and all. There are
holes here and there for decoupling caps. There are also 2 files in
BoardMaster format, which contain the actual artwork. Those can be plotted,
or HP LaserJet printed using BoardMaster. A good way to mount this board is
to solder 64 wires into the board, then solder your 68000 to those (Look at
the AtOnce). Just an idea.
----------------------------------------------------
Also from Silicon Synapse Electronics ShareWare Division:

S.A.P.E.P.  (Simple Amiga Parallel Eprom Programmer)
Incredible software/hardware combo. Program 2764-27128 21v/12.5v eproms thru
the Pport. Fairly simple project shows just how versitile the Amiga's parallel
port can be! Includes complete schematics, SAPEP program & C source.

The Computer Tech Journal
Issue #1: Audio Sampler Fundamentals (includes demo circuits)
Issue #2: 8meg Ram for Amiga  (ignore this, new one this fall)
Issue #3: Eprom Programmer (Look for S.A.P.E.P., software/hardware project)
Issue #4: Proto-Board for the Amiga  (a must have for any Amiga hacker!)

To get all the ShareWare/PD files listed in this file, just send $2 (US or
CDN) and your return address to:

  John Kamchen
c/o Silicon Synapse Electronics
41 Matheson Ave.E
Winnipeg Manitoba Canada
           R2W-0C1

Or call Silicon Synapse Electronics BBS (204) 589-1078 12/24 24hrs
or Fire & Brimstone BBS (204) 255-8824  12/24 24hrs Fido# 1:348:705.0

J.Kamchen  Nov.27  1991  3:30pm
-eof-
